Semiconductor device and semiconductor package containing the same

ABSTRACT

According to the present invention, a semiconductor device, having an electrode pad as a part of wirings on the uppermost layer thereof, includes a passivation film and a bump electrode for external connection. The passivation film is formed on the electrode pad, and the bump electrode is formed on the passivation film and electrically connected to the electrode pad. The electrode pad is formed so as to be smaller in size than the bump electrode, and a part of the wiring on the uppermost layer are formed under the bump electrode. In this manner, it is possible to utilize the area under the bump electrode effectively without sacrificing flatness of the passivation film. As a result, the semiconductor device and the semiconductor package can be made smaller.

CROSS REFERENCE TO RELATED APPLICATION

This application claims the priority of Application No. 2006-319417,filed Nov. 28, 2006 in Japan, the subject matter of which isincorporated herein by reference.

TECHNICAL FIELD OF THE INVENTION

The present invention relates to a semiconductor device having bumpelectrode as an external terminal, implemented with TCP (Tape CarrierPackage) or COF (Chip On Film) technologies. More particularly, thepresent invention relates to an LCD (Liquid Crystal Display) driverpackage provided with a plurality of narrow-pitch bump electrodes.

BACKGROUND OF THE INVENTION

Upon assembling a product using the TCP implementation, a technologycalled TAB (Tape Automated Bonding) is used. On a main surface of asemiconductor chip, a bump electrode is formed as an external terminal,and the semiconductor chip is bonded to a film carrier with Inner-LeadBonding (ILB). The film carrier has a long tape-like shape, on whichrepetitive wiring patterns are formed. The film carrier has deviceholes, each of which exposes an inner lead, and outer leads, and isautomatically conveyed for each device hole. The semiconductor chip isaligned with a given position of the device hole, and the bump electrodethereof is bonded to the inner lead on the film carrier using atechnology such as a thermal compression bonding process. Subsequently,the outer leads are bonded to key points on the semiconductor chip.

FIGS. 1A and 1B are a plan view and a cross-sectional view,respectively, of a conventional semiconductor device, showing astructure around a bump electrode thereof. A semiconductor device 12includes a semiconductor chip 11 and an electrode pad 22. Thesemiconductor chip 11 further includes a plurality of wiring layers (notshown diagrammatically) that are insulated from each other withinter-layer insulating films. The electrode pad 22 is provided as a partof the wirings at the uppermost layer. A passivation film 24, having anopening, which is smaller in size than the bump electrode 14, which isto be explained hereinafter, is provided on the electrode pad 22. Anunder-bump metal 23 is formed on the passivation film 24, and connectedto the electrode pad 22 through the opening thereof. The bump electrode14 is connected to the electrode pad 22 via the under-bump metal 23. Aninner lead 18 of a film carrier is connected to the bump electrode 14 bya thermal compression bonding process.

To keep the passivation film 24 flat, the electrode pad 22 is keptlarger in dimension than the bump electrode 14. Therefore, the bumpelectrode 14 completely overlaps with the electrode pad 22.

Japanese Patent Number 2919488 discloses a technology related to thepresent invention.

Recently, as the miniaturization of the semiconductor chip hasprogressed, the electrode pad has come to occupy a large portion of thechip footprint, leading to reduced competitiveness in cost. However, ithas been difficult to reduce the size of the bump electrode itself whileensuring a sufficient area for contact thereof with the inner lead.

In the conventional semiconductor device as shown in FIG. 1, theelectrode pad 22 had to be larger in size than the bump electrode 14 toensure the flatness of the passivation film 24. Thus, it has not beenpossible to utilize the area under the bump electrode 14, and, in turn,to reduce the size the semiconductor device itself.

OBJECTS OF THE INVENTION

The present invention is developed to solve the above-described problem.In other words, an object of the present invention is to provide asemiconductor device and a semiconductor package for reducing the sizeof the semiconductor device without sacrificing the flatness of thepassivation film, by utilizing the area under the bump electrode moreeffectively.

Additional objects, advantages and novel features of the presentinvention will be set forth in part in the description that follows, andin part will become apparent to those skilled in the art uponexamination of the following or may be learned by practice of theinvention. The objects and advantages of the invention may be realizedand attained by means of the instrumentalities and combinationsparticularly pointed out in the appended claims.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention, a semiconductordevice, having an electrode pad as a part of an uppermost wiring layer,includes a passivation film, which is formed on the electrode pad tohave an opening therein; and a bump electrode for external connection,which is formed on the passivation film and is electrically connected tothe electrode pad through the opening of the passivation film. Theelectrode pad is formed so as to be smaller in size than the bumpelectrode. A part of the uppermost wiring layer is formed under the bumpelectrode.

If there is only one wiring layer, the “uppermost wiring layer” hereinmeans the single wiring layer itself. If there are a plurality of wiringlayers, which are insulated from each other with inter-layer insulatingfilms, the uppermost wiring layer means the wiring layer formed on theuppermost layer among those wiring layers.

According to a second aspect of the present invention, a semiconductorpackage, having the semiconductor device according to the first aspectof the present invention, is fabricated using a film carrier having aplurality of leads, which are held on an insulating film, and an end ofeach of the leads are connected to the bump electrode as an inner lead.

According to the present invention, an internal wiring can be arrangedin an area where an electrode pad was conventionally formed, so that thechip size can be reduced. At the same time, the passivation film can bekept flat by certain formations of the internal wirings. Therefore, itis possible to prevent the manufacturing process from becomingcomplicated and the manufacturing cost from increasing, withoutproviding a special design such as arranging dummy wirings under thebump electrode.

Because the passivation film is kept flat, the flatness of the bumpelectrode itself is improved, further improving the connection with theinner lead, which is connected with the bump electrode using atechnology such as a thermal compression bonding process. Furthermore,it is possible to prevent a formation of a gap between the passivationfilm and the bump electrode, therefore, to reduce the risk of shortcircuit caused by a foreign substance getting into the gap.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B are a plan view and a cross-sectional view,respectively, of a conventional semiconductor device, showing astructure around a bump electrode thereof;

FIG. 2 is a side view of a semiconductor package related to the presentinvention.

FIGS. 3A and 3B are a plan view and a cross-sectional view,respectively, of a semiconductor device according to a first embodimentof the present invention, showing a structure around a bump electrodethereof;

FIG. 4 is a plan view of the semiconductor device according to the firstembodiment of the present invention, showing the structure around thebump electrode and the layout of the electrode pad and wirings providedunder the bump electrode;

FIG. 5 is a plan view of the semiconductor device according to a secondembodiment of the present invention, showing a structure around a bumpelectrode and a layout of an electrode pad and wirings provided underthe bump electrode; and

FIG. 6 is a plan view of the semiconductor device according to a thirdembodiment of the present invention, showing a structure around a bumpelectrode and a layout of an electrode pad and wirings provided underthe bump electrode.

DESCRIPTIONS OF REFERENCE NUMERALS

-   100 semiconductor package-   112 semiconductor device-   114, 214, 314 bump electrode-   118 inner lead-   116 insulating film-   120 resin member-   122, 222, 322 electrode pad-   123 under-bump metal-   124, 224, 324 passivation film-   130, 230, 330 internal wiring-   232 power wiring

DETAILED DISCLOSURE OF THE INVENTION

In the following detailed description of the preferred embodiments,reference is made to the accompanying drawings which form a partthereof, and in which is shown by way of illustration specificallypreferred embodiments in which the inventions may be practiced. Thesepreferred embodiments are described in sufficient detail to enable thoseskilled in the art to practice the invention, and it is to be understoodthat other changes may be made without departing from the spirit andscope of the present inventions. The following detailed description is,therefore, not to be taken in a limiting sense, and scope of the presentinvention is defined only by the appended claims.

FIG. 2 is a side view of a semiconductor package related to the presentinvention. A semiconductor package 100 includes a semiconductor device112, a plurality of leads 118, and a resin member 120. The semiconductordevice 112 is provided with a semiconductor chip 111 and electrode pads122. The semiconductor chip 111 further includes a plurality of wiringlayers that are insulated from each other with inter-layer insulatingfilms. The electrode pads 122 are provided as a part of the wirings onthe uppermost wiring layer. The leads 118 are held on an insulating film116. The resin member 120 is provided to protect the surface of thesemiconductor device 112 and the inner lead 118. The semiconductorpackage having such structure is manufactured with a film carrierprovided with the inner leads 118 to be connected with bump electrodes114.

An example of the semiconductor chip 111 is an LCD driver chip. Some LCDdriver chips are provided as a semiconductor integrated circuit (IC)having a plurality of semiconductor elements, and have a shape of arectangle, whose side having the semiconductor IC is five or more timeslonger than other sides thereof. The semiconductor IC in the LCD driverchip, not shown diagrammatically, includes an inputting circuit, amemory such as Random Access Memory (RAM), a logic circuit, and anoutput circuit, and is configured so that each element operates incooperation with the others. The logic circuit is formed with gatearray, for example, and functions as a data processor. The outputcircuit includes a latch circuit, and is provided to output signals. Thesemiconductor chip 111 also includes a plurality of narrow-pitched bumpelectrodes that correspond to the input circuit and output circuitthereof. Especially for output circuit, the bump electrodes 114 areprovided in a narrower-pitched array in a greater number.

The film carrier (116, 118) includes a plurality of leads 118 that areheld on the insulating film 116. The film carrier also has a series ofdevice holes, each of which exposes the leads 118 as an inner lead. Eachof the inner leads 118 is connected to each of the bump electrodes 114provided on the semiconductor device 112. A known TAB technology is usedfor the connection between the inner lead 118 and the bump electrode114. In other words, the film carrier (116, 118) is conveyed for eachdevice hole, and the semiconductor device 112 is aligned with a givenposition of the device hole. Subsequently, a set of the bump electrodes114 and the inner leads 118 are bonded simultaneously with a bondingtool, using a technology such as a thermal compression bonding process.Then, the resin member 120 is formed to cover the edge of thesemiconductor 112 and the inner lead 118, including the nearbyinsulating film 116.

An example of the insulating film 116 is a polyimide film, and thethickness thereof should be equal or less than 100 μm, for example, in arange between 70 and 80 μm. The thickness of the leads 118 of insultingfilm 116 should be equal to or less than 30 μm, for example, in a rangebetween 10 and 20 μm.

FIGS. 3A and 3B are a plan view and a cross-sectional view,respectively, of the semiconductor device 112 according to the firstembodiment of the present invention, showing a structure around a bumpelectrode thereof. FIG. 4 is a plan view of the semiconductor device 112according to the first embodiment of the present invention, showing thestructure around the bump electrode and the layout of the electrode padand wirings provided under the bump electrode. The semiconductor 112includes a passivation film 124; and a bump electrode 114 for externalconnection. The passivation film 124 is formed over the electrode pad122, and has an opening. The bump electrode 114 is formed on thepassivation film 124, and is electrically connected to the electrode pad122 through the opening of the passivation film 124. Parts 130 of thewirings of the uppermost layer in the semiconductor chip 111 areprovided under the bump electrode 114.

The passivation film 124 has an opening, which is smaller in size thanthe bump electrode 114, and is provided with an under-bump metal 123,which is connected to the electrode pad 122 through the opening thereof.The bump electrode 114 is connected to the electrode pad 122 via theunder-bump metal 123. The inner lead 118, which is held on the filmcarrier, is connected onto the bump electrode 114 by a thermalcompression bonding process.

The under-bump metal 123 may be made of a material such as nickel,Ti/Pt, or TiW/Au. The passivation film 124 may be made of a materialsuch as oxidized film, nitride film, or polyimide. It is also possibleto form a wafer coating over the passivation film 124, using a materialsuch as polyimide. The electrode pad 122 may be made of a material suchas Al, Al—Si, Al—Si—Cu, or Cu.

The bump electrode 118 may be made of a material such as gold, silver,copper, nickel, or solder. The bumper electrode 114 may have a rectangleform, having the dimensions of 20 μm×60 μm to 50 μm×100 μm, for example.Distance between each bump should be equal to or greater than 10 μm, andbump pitch should be in a range from 30 to 60 μm.

To manufacture the bump electrode 114 made of gold, for example, theelectrode pad 122 and the passivation film 124 are at first formed on asemiconductor substrate. Then, a barrier metal 123, made of TiW/Aulaminate structure, is formed over the electrode pad 122 and thepassivation film 124. Resist (not shown diagrammatically) is appliedover the barrier metal 123 to form a resist pattern. The resist patternis provided so as to have an opening at a given position on top of theelectrode pad 122. Subsequently, gold plating is formed, following theresist pattern made using electrolytic plating. The resist pattern isthen removed and excessive barrier metal 123 is removed from thepassivation film 124 by etching, using the gold-plated shapes on theelectrode pad 122 as a mask.

For embedding and flattening the multi-layer wiring of the semiconductorchip 111, TEOS (tetra-ethyl-ortho-silicate, tetraethoxysilane) film, orBPSG (boron-phosphorus-silicate-glass) film, PSG film or SOG film may beused for the inter-layer insulating film. The inter-layer insulatingfilm can be formed with a thickness of 10000 Å, using techniques such asCVD, sputtering, plasma-CVD, or coating.

According to the first embodiment of the present invention, theelectrode pad 122 is formed to be smaller in size than the bumpelectrode 114. Because the smaller the size of the electrode pad 122becomes, the greater the space available for wirings gets. With that,the internal wirings 130 can be provided under the bump electrode 114 onuppermost layer of the semiconductor chip 111. Because the internalwirings 130 are present, the passivation film 124 is kept flat.Furthermore, the flatness of the passivation film 124 is improved byarranging the internal wirings 130 regularly. Therefore, it is possibleto prevent the manufacturing process from becoming complicated and themanufacturing cost from increasing, without providing a special designsuch as arranging dummy wirings under the bump electrode 114.

According to the first embodiment of the present invention, strips ofthe internal wirings 130 are arranged in a parallel fashion; however,the shape and direction thereof may be modified accordingly, dependingon a function or other limitations of the semiconductor chip.

FIG. 5 is a plan view of the semiconductor device according to a secondembodiment of the present invention, showing a structure around a bumpelectrode 214 and a layout of an electrode pad 222 and wirings 230, 232provided under the bump electrode 214. According to the secondembodiment of the present invention, the electrode pad 222 is notpositioned directly below the bump electrode 214, but is positionedtoward the edge. The wiring 230 is laid across the electrode pad 222.Because the electrode pad 222 is positioned toward the edge, a largespace under the bump electrode 214 becomes available, so that a thickpower wiring 232 is formed in this space. According to the secondembodiment of the present invention, by arranging a thick wiring 232under the passivation film 224, the flatness of the passivation film 224is further improved.

FIG. 6 is a plan view of the semiconductor device according to a thirdembodiment of the present invention, showing a structure around a bumpelectrode 314 and a layout of an electrode pad 322 and wiring 330provided under the bump electrode 314. In this embodiment of the presentinvention, the electrode pad 322 is not positioned directly below thebump electrode 314, but is positioned toward the edge. The wiring 330 islaid across the electrode pad 322. The example according to the thirdembodiment of the present invention may be used when a passivation film324 is not required to be highly flat upon forming the bump electrode314.

The present invention is explained herein using the above preferredembodiments; however, these preferred embodiments are not intended tolimit the scope of the present invention. The present invention may bemodified in design within the scope of the technical concepts disclosedin the appended claims. For example, instead of the rectangle electrode,a bump electrode having a shape of a circle, an ellipsoid, or a trianglemay also be used. The number of wiring layers does not affect theadvantages of the present invention. Furthermore, the present inventionmay be applied not only to the LCD driver chip, but also to othervarious semiconductor devices that uses a bump electrode.

1. A semiconductor device, having an electrode pad as a part of anuppermost wiring layer, comprising: a passivation film, which is formedon the electrode pad to have an opening therein; and a bump electrodefor external connection, which is formed on the passivation film and iselectrically connected to the electrode pad through the opening of thepassivation film, wherein the electrode pad is formed so as to besmaller in size than the bump electrode; and a part of the uppermostwiring layer is formed under the bump electrode.
 2. The semiconductordevice according to claim 1, wherein the semiconductor device is a LCDdriver chip.
 3. The semiconductor device according to claim 1, whereinthe part of the uppermost wiring layer formed under the bump electrodeis a power wiring.
 4. The semiconductor device according to claim 2,wherein the part of the uppermost wiring layer formed under the bumpelectrode is a power wiring.
 5. A semiconductor package, having thesemiconductor device according to claim 1, wherein the semiconductorpackage is fabricated using a film carrier having a plurality of leads,which are held on an insulating film, and an end of each of the leadsare connected to the bump electrode as an inner lead.
 6. Thesemiconductor package according to claim 5, wherein the inner lead andthe bump electrode are connected by a thermal compression bondingprocess.
 7. The semiconductor package according to claim 5 furthercomprising: a resin member which protects the semiconductor device andthe inner lead.
 8. The semiconductor package according to claim 6further comprising: a resin member which protects the semiconductordevice and the inner lead.